新人求助:按照官方教程做的编译出错

发表在 内核学习营2019-4-17 02:22 [复制链接] 15 391

新人求助:" J; x' E0 p( V, n
       我按照如下两个教程
4 Z, y1 y$ c! a1、https://www.rt-thread.org/docume ... nano/cube/nano-mx5/) P9 p- s' v; j) d
2、https://www.rt-thread.org/docume ... o_finsh/nano-finsh/* f0 b8 f4 i  P! v) c5 j* ^

0 p" J  W; H3 S一步一步照着做,只是芯片换成103RB(创建nano工程都没问题),到第二个帖子修改头文件那个步骤后出现编译错误。(我本想上传图片,结果还是上传不了;想上传我的问题工程,结果附件也无法上传。。。。上传结果提示:SERVER(IO)ERROR): u2 U$ q. w' p; P3 l. }& k) `+ G

$ L9 K7 _5 a# {# |+ o" `- `编译提示如下错误:(要崩溃了,想用3.1.2版本的nano-msh怎么就那么难呢?纠结这个问题快一个月了,我一直是用标准库的,为了用nano-msh,今天照着教程现学hal库。。。)7 a4 @5 u1 C  k: @' x/ \' O
4 m5 f& v) @* I. L% Y$ a8 [
../Inc/drv_usart.h(51): error:  #20: identifier "UART_HandleTypeDef" is undefined% ]9 V9 Y3 t# s7 s8 j9 f3 h# ^7 s
      UART_HandleTypeDef handle;4 @  s5 ]5 o! ]* Y' ?5 e
..\Src\drv_usart.c(93): error:  #20: identifier "UART_HWCONTROL_NONE" is undefined  k. V( j- v$ X
      uart->handle.Init.HwFlowCtl    = UART_HWCONTROL_NONE;& `- H9 [( S& e6 \* Z/ E0 o
..\Src\drv_usart.c(94): error:  #20: identifier "UART_MODE_TX_RX" is undefined
( R' r3 Z' \7 }9 ~5 m* R      uart->handle.Init.Mode         = UART_MODE_TX_RX;. p$ Q' B, W0 o9 {  y2 H: n
..\Src\drv_usart.c(95): error:  #20: identifier "UART_OVERSAMPLING_16" is undefined" V/ `9 f- z$ D" |# r) h
      uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
7 C" L4 B2 ^! F2 `( P..\Src\drv_usart.c(99): error:  #20: identifier "UART_WORDLENGTH_8B" is undefined
. X4 D% O+ C$ \          uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
! F3 C& \! T7 b7 V# t& [, X..\Src\drv_usart.c(102): error:  #20: identifier "UART_WORDLENGTH_9B" is undefined
6 _2 _% E9 w2 g$ ?! e          uart->handle.Init.WordLength = UART_WORDLENGTH_9B;9 M( ^( N# e0 @; @" d& g0 E$ K
..\Src\drv_usart.c(111): error:  #20: identifier "UART_STOPBITS_1" is undefined
; P1 `/ Z- [5 Q* ^% Q/ T          uart->handle.Init.StopBits   = UART_STOPBITS_1;2 U6 \: r* z  g' I! ?4 M8 t" P$ S' m  q
..\Src\drv_usart.c(114): error:  #20: identifier "UART_STOPBITS_2" is undefined
% S- o  C$ u8 y2 A          uart->handle.Init.StopBits   = UART_STOPBITS_2;9 U9 l" Z9 O! M1 {+ X- J
..\Src\drv_usart.c(123): error:  #20: identifier "UART_PARITY_NONE" is undefined. M( J* x2 n# t9 f
          uart->handle.Init.Parity     = UART_PARITY_NONE;
1 [: @8 }* {6 d: {..\Src\drv_usart.c(126): error:  #20: identifier "UART_PARITY_ODD" is undefined
1 |- [" f5 {/ \6 G          uart->handle.Init.Parity     = UART_PARITY_ODD;, H8 H- R" _) Z% Y/ q) \% t
..\Src\drv_usart.c(129): error:  #20: identifier "UART_PARITY_EVEN" is undefined
' e$ b. `9 M$ r3 E          uart->handle.Init.Parity     = UART_PARITY_EVEN;6 x- }: @1 U# ]
..\Src\drv_usart.c(136): warning:  #223-D: function "HAL_UART_Init" declared implicitly% g0 M0 c% U* k$ H/ `" T
      if (HAL_UART_Init(&uart->handle) != HAL_OK)
9 |9 P1 ~' e# n- M; n1 k! H% c..\Src\drv_usart.c(162): warning:  #223-D: function "__HAL_UART_DISABLE_IT" declared implicitly
; u" j% Y) F/ T# r: ^  Z          __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);  U2 O2 a; B0 k, O3 l4 p! U+ L" W
..\Src\drv_usart.c(162): error:  #20: identifier "UART_IT_RXNE" is undefined  L' N/ E* Q6 p; {0 Z
          __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);% }4 H2 B% y# p( C9 c0 E
..\Src\drv_usart.c(169): warning:  #223-D: function "__HAL_UART_ENABLE_IT" declared implicitly
! E4 ?  J7 |" A& y1 t: P4 y          __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
" d# v/ F1 j5 ]' j% C..\Src\drv_usart.c(190): warning:  #223-D: function "__HAL_UART_CLEAR_FLAG" declared implicitly' X6 X9 e7 {' D. e
      UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
! h$ \7 O4 N  a..\Src\drv_usart.c(190): error:  #20: identifier "UART_FLAG_TC" is undefined
/ ^. U$ E( Z4 K) |$ I! a- O: V) L. [      UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);) r% [* H: l6 c" B6 L
..\Src\drv_usart.c(197): warning:  #223-D: function "__HAL_UART_GET_FLAG" declared implicitly
, Z) E% Y3 q( R3 z      while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);/ `; f7 Y2 A8 S/ K1 H7 K, F
..\Src\drv_usart.c(210): warning:  #223-D: function "__HAL_UART_GET_FLAG" declared implicitly
1 x- t8 }$ a9 \! ?% M( I' D      if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)& M% _. X1 }* C# b" f4 Q
..\Src\drv_usart.c(210): error:  #20: identifier "UART_FLAG_RXNE" is undefined
/ N- L0 y* p9 i! j/ w( O      if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)8 e1 K/ Z: i1 t2 c# {' K3 O
..\Src\drv_usart.c(249): warning:  #223-D: function "__HAL_UART_GET_FLAG" declared implicitly7 `, p/ |4 `' p8 }+ z: {
      if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
; v: P/ U. ~9 W..\Src\drv_usart.c(249): error:  #20: identifier "UART_FLAG_RXNE" is undefined2 g4 d2 X, u$ @6 ~* H  N; C
      if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
# A3 p6 R$ Z/ ^* N..\Src\drv_usart.c(250): warning:  #223-D: function "__HAL_UART_GET_IT_SOURCE" declared implicitly
/ l* Q. N- K- j  Z5 Z, Z( k- x2 [: P          (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
$ _+ e; ]" }; u+ N..\Src\drv_usart.c(250): error:  #20: identifier "UART_IT_RXNE" is undefined
# A7 C, y; m1 l% V* l          (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))7 }5 Y3 B- Q6 @" q5 Z# H
..\Src\drv_usart.c(273): error:  #20: identifier "UART_FLAG_ORE" is undefined2 a9 c0 N) q9 C& s+ t( l. G
          if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
; m9 [( O$ d* Z3 u' e- L..\Src\drv_usart.c(275): warning:  #223-D: function "__HAL_UART_CLEAR_OREFLAG" declared implicitly" f) p( R( n* c! q5 H! W
              __HAL_UART_CLEAR_OREFLAG(&uart->handle);+ q+ l2 M: i' `' u( h+ P2 V
..\Src\drv_usart.c(277): error:  #20: identifier "UART_FLAG_NE" is undefined# O& P& C* E2 y( n# E( H
          if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)( S8 n6 j- }/ x
..\Src\drv_usart.c(279): warning:  #223-D: function "__HAL_UART_CLEAR_NEFLAG" declared implicitly
1 P0 y- Q4 w. \4 ]6 ~8 [3 C, }1 ^              __HAL_UART_CLEAR_NEFLAG(&uart->handle);. O  T  l1 x- ^) R% z& ]1 b
..\Src\drv_usart.c(281): error:  #20: identifier "UART_FLAG_FE" is undefined
6 ]& l5 ^  h; i* j! @1 w          if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET); j* Y, ^* B. @  t" W3 M7 X. G
..\Src\drv_usart.c(283): warning:  #223-D: function "__HAL_UART_CLEAR_FEFLAG" declared implicitly
7 l  }1 u) c" g+ [. @: I3 @2 {              __HAL_UART_CLEAR_FEFLAG(&uart->handle);
# h! |; W/ [! F( \..\Src\drv_usart.c(285): error:  #20: identifier "UART_FLAG_PE" is undefined: g: Q% d" n8 P1 D
          if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)0 m3 h- T/ W% l0 d! V
..\Src\drv_usart.c(287): warning:  #223-D: function "__HAL_UART_CLEAR_PEFLAG" declared implicitly
' `6 c+ L; M+ W; u0 f              __HAL_UART_CLEAR_PEFLAG(&uart->handle);1 d- O  t$ y/ y+ m+ k
..\Src\drv_usart.c(291): error:  #20: identifier "UART_FLAG_LBD" is undefined5 v0 Q0 r$ b6 b' @6 A, O0 U# x
          if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)9 l1 v- q& G9 `4 Y8 L2 K* T
..\Src\drv_usart.c(293): warning:  #223-D: function "__HAL_UART_CLEAR_FLAG" declared implicitly  K4 T& W4 Y: ^$ q) r; Z
              UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);% C, T6 q  t5 u
..\Src\drv_usart.c(296): error:  #20: identifier "UART_FLAG_CTS" is undefined
2 E2 H: M% |6 u0 Z          if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET); [* E: ^9 ~: W1 `+ M( F9 a' i3 k
..\Src\drv_usart.c(298): warning:  #223-D: function "__HAL_UART_CLEAR_FLAG" declared implicitly
* ]& U2 j% u  J! }( h  m              UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);- t  E2 |$ X! k7 x
..\Src\drv_usart.c(300): error:  #20: identifier "UART_FLAG_TXE" is undefined
5 K: k7 {, u+ u1 d3 I          if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)3 I  v; S$ y) K" \* C& v
..\Src\drv_usart.c(302): warning:  #223-D: function "__HAL_UART_CLEAR_FLAG" declared implicitly, p& {, W4 v# w" U4 X1 a; T
              UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
0 b5 {5 `) d4 I0 k( C$ \..\Src\drv_usart.c(304): error:  #20: identifier "UART_FLAG_TC" is undefined
4 {8 }$ |+ o" }7 k2 i# R          if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)' D' k2 i( W5 W
..\Src\drv_usart.c(306): warning:  #223-D: function "__HAL_UART_CLEAR_FLAG" declared implicitly
- [( q3 U- }& N0 Y2 y4 R* }9 m  k              UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);/ b9 y5 Q: G6 ?' x8 m
..\Src\drv_usart.c(310): warning:  #223-D: function "__HAL_UART_CLEAR_FLAG" declared implicitly
) r% r+ L+ [% u. Q+ o3 w              UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);$ N) O9 i/ e( s, T1 R5 ?" ^& T5 p
..\Src\drv_usart.c: 17 warnings, 24 errors6 B4 `0 E# ^4 m! W
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发表于 2019-4-17 09:51:56 | 显示全部楼层
微信截图_20190417094950.png   e5 _3 }+ I, W$ \1 c$ w
例程展示stm32l475,不是例程的平台,根据此仿照流程。上图表示,猜测可能出现的问题,你看看驱动里面的宏定义是什么,据此类似修改% x& @) [3 ~# w$ N$ {& x* `
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发表于 2019-4-17 09:57:30 | 显示全部楼层
微信截图_20190417094950.png 使用驱动如上图所示,相关文件地址、名称, @* L: S, ]9 e/ w1 t
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发表于 2019-4-17 10:01:55 | 显示全部楼层
https://www.rt-thread.org/qa/thread-10348-1-1.html
+ L6 g0 |8 ^( `. T: M老的bsp驱动可以参考这个更改3 _0 c; z7 E7 z, x& ]4 @8 o' V
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发表于 2019-4-17 10:02:51 | 显示全部楼层
Ernest 发表于 2019-4-17 09:51
' S2 u- ~7 T" S3 s5 J例程展示stm32l475,不是例程的平台,根据此仿照流程。上图表示,猜测可能出现的问题,你看看驱动里面的宏 ...
- I, a- [) o3 g$ q! N. I
这里已安装F1的修改过了
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发表于 2019-4-17 10:03:06 | 显示全部楼层
Ernest 发表于 2019-4-17 09:57* t0 l: g. ^( Z9 y  N9 n3 m% y
使用驱动如上图所示,相关文件地址、名称

1 G) A6 G9 f! \' a/ {' m这里也是用的F1的
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发表于 2019-4-17 10:04:45 | 显示全部楼层
马上我帖出文件内容
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发表于 2019-4-17 10:07:52 | 显示全部楼层
Tiv 发表于 2019-4-17 10:03# e# ]" y0 p' ~+ w; X% X/ B
这里也是用的F1的
6 F( x) S, p& K$ ^+ s
完全没有问题:F1的有,参照改改,一步步来
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发表于 2019-4-17 10:17:38 | 显示全部楼层
rtconfig.h' X& C* V: g8 Y# K
  1. ( d3 t% F9 E/ e8 V" Y" e( O3 o
  2. /* RT-Thread config file */
    ! K( r+ x, L# V9 ^. q/ ?8 m9 W

  3. " W7 g. u( Y5 v; u6 L" {
  4. #ifndef __RTTHREAD_CFG_H__6 I$ \- v5 [9 V! i1 t/ X
  5. #define __RTTHREAD_CFG_H__
    $ v) N" {! b0 v9 ]" \8 f) q: z
  6. 1 a, `# J0 {# x" Z8 I9 J
  7. #include "RTE_Components.h"
    3 |$ m& a3 R2 U7 z1 a* ]

  8.   X; P4 U2 v) r1 P# t
  9. // <<< Use Configuration Wizard in Context Menu >>>: ?- A" z; G3 `, a
  10. // <h>Basic Configuration% u0 Q9 H! q4 x  S9 w! p4 y
  11. // <o>Maximal level of thread priority <8-256>* s+ i7 j& L" R; W( y& E
  12. //        <i>Default: 32+ p  x: l9 r* h1 e6 Y7 A
  13. #define RT_THREAD_PRIORITY_MAX 32
    0 n1 Q$ a2 g7 @. A: R) w
  14. 6 F; B8 L8 Y: p6 [2 I
  15. // <o>OS tick per second
    / Y, l" u- e$ h6 l
  16. //  <i>Default: 1000   (1ms)0 o" X. N+ k  E+ ?6 C
  17. #define RT_TICK_PER_SECOND 1000' u; L1 C9 J* T( R$ V7 d2 l4 [

  18. 2 v5 |* H2 w  |) Y
  19. // <o>Alignment size for CPU architecture data access2 F" b# e+ S- \6 f
  20. //        <i>Default: 4  P; `! k3 e( Y) k, j& ]8 ~
  21. #define RT_ALIGN_SIZE 4& G  {( p1 w/ Z8 U9 v# \* ]* E9 R0 L9 ]
  22. . [. D0 ~7 s) o
  23. // <o>the max length of object name<2-16>5 v# M$ z" b" C9 \* b: j/ A
  24. //        <i>Default: 81 l# B! ^" u( E6 K" N
  25. #define RT_NAME_MAX 8# G# K* V! N" ]6 g+ P$ m+ O

  26. $ s3 y& n& A% h3 g/ H# r/ H+ a
  27. // <c1>Using RT-Thread components initialization
      j3 U% y$ z/ {
  28. //  <i>Using RT-Thread components initialization
    ! H* Q8 i( y, O; @
  29. #define RT_USING_COMPONENTS_INIT+ y) S8 F9 A6 c. F9 i
  30. // </c>
    8 z# W, `, v5 i! `( A  r4 U
  31. 2 w. ^* b, W5 Z' V6 F2 c9 C+ ]9 f
  32. // <c1>Using user main* w9 L+ Q9 e: v! P$ |  o$ Z# F
  33. //  <i>Using user main( s0 Y( a' h' C5 V  L# l# S
  34. #define RT_USING_USER_MAIN- e& X. {2 n! Z6 ]5 `- a  s( [
  35. // </c>
    8 f/ u, ?4 T& D  B4 @5 k
  36. 5 k# t8 |" b: X3 n
  37. // <o>the size of main thread<1-4086>
    6 W" b: ?* b! |$ O1 p
  38. //        <i>Default: 5125 M3 }* M$ T: ?" f  `% m8 {
  39. #define RT_MAIN_THREAD_STACK_SIZE 1024" x/ _% s& r, d8 e4 V" p* w
  40. - q* X5 E/ D9 Q; {0 U2 G* }2 U
  41. // <c1>using tiny size of memory* M* M3 C! t1 `4 B* w! K7 Z, X. G# |
  42. //  <i>using tiny size of memory6 X2 U5 e- w  |- A* k4 V$ w) e
  43. //#define RT_USING_TINY_SIZE+ f' G( `2 T! @/ U. Y) \% }
  44. // </c>& @" ?. q! G% y2 I
  45. // </h>$ K2 H6 ?4 B! Q) [
  46. ! c0 v0 \7 p1 ~1 j$ }& x
  47. // <h>Debug Configuration
    4 X5 O+ Y: B3 b6 V) `) g( V
  48. // <c1>enable kernel debug configuration
    . q6 K+ E( @5 W: S- I) |# L
  49. //  <i>Default: enable kernel debug configuration
    ; q& C4 V( G# _" v: h# z9 U6 h
  50. //#define RT_DEBUG
    8 l7 `, k0 H2 B/ Y
  51. // </c>( b# G% H, p% O
  52. / R, z" I# M% x$ ?* c
  53. // <o>enable components initialization debug configuration<0-1>% s2 ?" v3 D2 ?8 m8 ^( d5 r* {
  54. //  <i>Default: 0
      f( ~: h6 j- S1 L) }+ `. q6 a7 P
  55. //#define RT_DEBUG_INIT9 {9 o/ W# C' o( z  x% D' M
  56. 1 L9 @8 f& k! k. n$ q- L% ~1 {7 o
  57. // <c1>thread stack over flow detect
    9 y4 h: }* U0 ^# u2 ]1 N
  58. //  <i> Diable Thread stack over flow detect
    1 Z* y6 R; v+ m/ ?) B2 b( M3 _
  59. //#define RT_USING_OVERFLOW_CHECK) I6 `# h4 ?" x
  60. // </c>
    0 V9 `+ f7 B  Q  {' x" y  `
  61. // </h>
    8 f' |) @; ^# u  q# y; J

  62. 3 h2 G4 _1 t7 b% z& U
  63. // <h>Hook Configuration
    ; r$ w/ w4 J+ ^' J/ |  F
  64. // <c1>using hook1 z* n$ M1 y6 E& b3 F, V* h" e7 m
  65. //  <i>using hook! H! e. b6 e# i1 C& t- A+ |! m
  66. //#define RT_USING_HOOK
    * R2 w9 T3 m1 R" q+ p8 {. T% V# B
  67. // </c>
    ( e$ m0 b! C3 T

  68. : T1 Q+ ?# M7 ?2 o
  69. // <c1>using idle hook" I. c$ |% o5 {4 J! m4 J# L
  70. //  <i>using idle hook. u3 ~$ E' S+ o: S
  71. //#define RT_USING_IDLE_HOOK) V- Y4 R, o  X
  72. // </c>( U, _2 p7 b. ?2 g3 P; l9 y* ?
  73. // </h>" C8 E6 J7 r5 y5 C
  74. : J3 d$ s9 S  p/ a( j
  75. // <e>Software timers Configuration
    - a2 ~9 Z0 k4 i' M  G
  76. // <i> Enables user timers) X, s: E# O7 }) r7 e+ R3 N: R* ]6 Y
  77. //#define RT_USING_TIMER_SOFT
    / m2 m6 n$ _7 z: l, Y3 w
  78. 1 s% e+ d5 c* `9 L
  79. // <o>The priority level of timer thread <0-31>! y. @: A' A% b! I2 D, B0 Y3 h
  80. //  <i>Default: 47 N% ?$ T" M. r% V4 S' m- i
  81. #define RT_TIMER_THREAD_PRIO 4
    , d/ ~* y' b. x* h% |- \+ g
  82. 4 \4 D4 f& X: o9 W9 }. _, m! O  E
  83. // <o>The stack size of timer thread <0-8192>) C8 A( K8 Q. C* S: |
  84. //  <i>Default: 512; ~1 ?3 X7 y, y; x4 o
  85. #define RT_TIMER_THREAD_STACK_SIZE 512
    , D& C& M( C* z) }% k
  86. 9 E, |% [- J" Q) I
  87. // <o>The soft-timer tick per second <0-1000>4 M& h) E5 U0 d2 e
  88. //  <i>Default: 100. O8 _! w' W& p0 g
  89. #define RT_TIMER_TICK_PER_SECOND 100
    , ~' f+ L5 K" e
  90. // </e>
    $ r- |8 l4 E: [9 s: v! v! |. S

  91. 1 S4 h/ D9 V. _7 P
  92. // <h>IPC(Inter-process communication) Configuration1 C! W# Z  c- _1 \
  93. // <c1>Using Semaphore+ @7 e  H& r" ?
  94. //  <i>Using Semaphore
    6 J+ t5 A2 p: l
  95. #define RT_USING_SEMAPHORE. D" H9 g' h9 A# C5 V, }
  96. // </c>
    ( B9 v9 M! H) @0 Z. w! V
  97. . Z& r% M6 t& G7 q; C/ K6 x8 Y5 m
  98. // <c1>Using Mutex9 T( i* i6 E3 c9 _8 [
  99. //  <i>Using Mutex
    # _. I! V7 L( q
  100. //#define RT_USING_MUTEX
    ; r! K6 J6 e; R/ j$ J$ Z
  101. // </c>
    , q$ K9 W; C! Y; W. l

  102. 3 W; [, k, t% @. H: u
  103. // <c1>Using Event
    ( s" V$ D- y! g$ W+ H$ B
  104. //  <i>Using Event
    2 V2 f" n5 k( Z& X
  105. //#define RT_USING_EVENT3 n6 p; r, N( ]" t4 I
  106. // </c>* S, z% o+ w! Y0 L! B0 D
  107. ! J" K* b. ]; V
  108. // <c1>Using MailBox% ~8 ~0 d" o* q, q3 v9 C' M
  109. //  <i>Using MailBox, K1 O: G: N5 O/ o0 \
  110. //#define RT_USING_MAILBOX! ^9 u5 m- E4 I
  111. // </c>+ S5 t7 W$ P* m0 `( V  N5 t

  112. ! i  ^9 R- y8 X* B) \
  113. // <c1>Using Message Queue
    : D8 v6 e7 @/ m, W4 G8 D+ A
  114. //  <i>Using Message Queue, y0 n5 B. N4 ?3 S) L* o
  115. //#define RT_USING_MESSAGEQUEUE$ T  a* O/ u2 o% Y) h
  116. // </c>
    " V- E7 N8 S6 [, o8 y
  117. // </h>
    % u2 V6 M- B0 F

  118. # w. r. u5 t* Q( l
  119. // <h>Memory Management Configuration
    8 b3 u- r# J9 r+ j* F% }; C8 F; c
  120. // <c1>Using Memory Pool Management* u7 w7 J0 ]6 m# i- j
  121. //  <i>Using Memory Pool Management. D8 H2 \8 m- }/ ^6 t. m
  122. //#define RT_USING_MEMPOOL
    , K4 q  z: x* q$ x
  123. // </c>9 w( n( ?/ S/ F+ Z& y. D
  124. // <c1>Dynamic Heap Management
    # f% x. I9 F9 ]% t& K) x
  125. //  <i>Dynamic Heap Management( e. z. {3 W+ ^" f
  126. #define RT_USING_HEAP
    & E3 p7 V7 C; w3 h+ S+ v
  127. // </c>- p2 Z6 [& s3 T7 G0 ~& f# F
  128. // <c1>using small memory5 y# p8 J. Q1 u3 k9 ^( ^$ E
  129. //  <i>using small memory* A# y" E3 @8 L3 z. o  d
  130. #define RT_USING_SMALL_MEM; t- f' W. J  ?5 h! l6 u/ \, h
  131. // </c>
    ; w. l; D  F! d$ p4 q- l
  132. // </h>
    5 [* `% c) h, W% `
  133. ' ?5 x/ W0 a+ i
  134. // <h>Console Configuration
    5 y! t3 Q/ B4 i5 B
  135. // <c1>Using console
    / R7 _8 Y: A) T% B9 Y1 y5 Z2 k
  136. //  <i>Using console
    2 c$ T- _: X7 W' P1 h
  137. #define RT_USING_CONSOLE
    % {5 z. n' b+ k! b2 k: `
  138. // </c>
    3 T# k1 G) Z2 H# {

  139. : {9 L$ O: F! Q# j  b, J" O
  140. // <o>the buffer size of console <1-1024>
    4 Y/ ^8 v9 R# [  f
  141. //  <i>the buffer size of console7 K  M7 ~7 k# r) D* U& `/ P# w! m
  142. //  <i>Default: 128  (128Byte)
    & x. M9 ^& f% X: r" z
  143. #define RT_CONSOLEBUF_SIZE 128) g2 R, L; _# _( `, [  E" T
  144. % y0 G& U7 D" X# c& _/ L1 E4 X$ T
  145. // <s>The device name for console6 L! ]+ j" L; d5 Y; a
  146. //  <i>The device name for console1 w  I2 j& r( C/ i+ b) P; S7 W( B
  147. //  <i>Default: uart0
    # h' U' z# U5 n7 d
  148. #define RT_CONSOLE_DEVICE_NAME "uart2"
    % @& J- @4 ?' v' ]4 l( {& v
  149. // </h>8 _. D: E6 T, R8 D

  150. 8 D5 l7 E% T/ b' D$ h, X+ E6 H
  151. #if defined(RTE_USING_DEVICE)- A  v, r0 t3 x8 z8 {
  152. #define RT_USING_DEVICE
    9 x: e; h+ S+ d4 ~: q; b0 P
  153. #define RT_USING_SERIAL
    7 M3 g( U( ~; L5 ~2 P$ i4 E9 b
  154. #define BSP_USING_UART2
    5 G3 a4 R7 U5 R% H2 q5 w
  155. #endif; A3 {  m9 J& B- r
  156. . n2 _4 G; c  t* N, Y: i
  157. #if defined(RTE_USING_FINSH)
    9 E6 d; p; \" p

  158. $ O  s( F9 [9 n' f
  159. // <h>Finsh Configuration# ]# h4 |  M3 d% j$ s% f0 p
  160. // <c1>Using FinSh Shell0 _: t% x# g1 h& S4 J3 o
  161. //  <i>Using FinSh Shell
    $ ^- s8 \  S) W  R8 Y" |
  162. #define RT_USING_FINSH+ ]! L9 `, ]- x+ Z' l! G" W( e
  163. // </c>6 M: h& [* P0 h5 G1 E+ x% V

  164. % u1 G! ?' m. c+ n  i
  165. // <c1>Using Msh Shell
    3 F% m3 b! n" E- {  f) u( S
  166. //  <i>Using Msh Shell( H7 G6 K$ e1 q& `; y2 x" l( ]* l
  167. #define FINSH_USING_MSH
      Z9 r) Q( T( ^, X5 {1 M0 u# f4 b" F- g
  168. // </c>; z% R4 S6 z- n- O
  169.   ^2 M+ \. M8 a6 R- L# B& s
  170. // <c1>Only using Msh Shell; `5 ^, s$ `: a3 |
  171. //  <i>Only using Msh Shell
    - ?$ _- D6 o- k+ w# k+ v7 A' |
  172. #define FINSH_USING_MSH_ONLY
    / k  {' }1 ?4 H/ ^$ i, p$ A: h
  173. // </c>0 U0 j% n# W4 r( A$ W* ?0 |
  174. % I6 |: E' L0 z, r
  175. // <o>the priority of finsh thread <1-7>7 G5 Q9 l" B4 f" l4 B; R; b. g
  176. //  <i>the priority of finsh thread
      j. s9 f! k# p: d
  177. //  <i>Default: 6
    & o2 ~) g8 `3 U" M' S4 W7 @" b
  178. #define __FINSH_THREAD_PRIORITY     1
    6 D7 ^% l0 b7 P4 @8 [
  179. #define FINSH_THREAD_PRIORITY       (RT_THREAD_PRIORITY_MAX / 8 * __FINSH_THREAD_PRIORITY + 1)
    8 r5 B( F$ ?( @/ n
  180. ( ~2 D$ }2 B7 a8 m
  181. // <o>the stack of finsh thread <1-4096>$ ?/ G2 [1 K6 b7 P% [# Q( c( H' w
  182. //  <i>the stack of finsh thread
    3 ^6 H0 u, [) p+ i: {# n. H7 }
  183. //  <i>Default: 4096  (4096Byte)
    % a! u! k/ _$ o9 p" V/ d! d, \/ J4 L
  184. #define FINSH_THREAD_STACK_SIZE 2048" }5 d" r% O1 X  u
  185. / M" p7 J& N8 y! }4 Z
  186. // <o>the history lines of finsh thread <1-32>( J# m- N9 e# Z$ n% e( Z. G
  187. //  <i>the history lines of finsh thread# P. M! M, j$ q& i1 O' A2 Z$ ~4 U
  188. //  <i>Default: 5
    8 o, u1 I, h' j; C. Z+ p; N
  189. #define FINSH_HISTORY_LINES                5( w; j& A1 `- A1 j

  190. ' L; W; ?% f' U0 N, O# s8 K# V
  191. // <c1>Using symbol table in finsh shell
    2 U' _& Q. x  Z& k* i
  192. //  <i>Using symbol table in finsh shell
    . X6 @; V# m+ a
  193. #define FINSH_USING_SYMTAB
    8 z, y( z0 y" t
  194. // </c>
    8 K) s9 j" t( |) `) ]0 ~
  195. // </h>
    2 ~) v% U: u3 O

  196. , p  W1 i8 p( x' S8 {
  197. #endif //RTE_USING_FINSH
    ( Z- x6 \- g3 X0 t3 \. j
  198. # S/ g: Z1 s& M1 }# u9 ^- R8 a
  199. #define SOC_SERIES_STM32F1
    4 r9 V: l& q  G
  200. // <<< end of configuration section >>>" ~7 |% N. S+ X0 x

  201.   _8 v& N( L# g7 q
  202. #endif
    ) F& Q# ^" t/ a, p7 m% L" q( L, T

  203. $ f' h# f$ T# g9 E
复制代码
drv_usart.h  F5 c9 H# j) F. ~. P
  1. /*
    1 _! H# `" i5 f4 I. a3 H6 X
  2. * Copyright (c) 2006-2018, RT-Thread Development Team2 ?0 p3 i3 Q! ]: D4 B4 i& Z
  3. *
    + h) W/ X7 I5 n5 x2 x
  4. * SPDX-License-Identifier: Apache-2.0
    6 W) N' |# G, B( X" F6 ?
  5. *+ x' N1 p% D9 G: f+ ^7 h. K
  6. * Change Logs:
    3 y5 a$ ?4 ~  p7 S9 S& ]
  7. * Date           Author       Notes* I! m+ u1 B9 s& @5 n9 Q
  8. * 2018.10.30     SummerGift   first version
    4 K* V# K. ~5 d" a0 d: U
  9. * 2019.03.05     whj4674672   add stm32h7 2 g% h$ B/ }! C' _- m) g
  10. */; d1 a& c7 e" G. A
  11. 7 j* Q+ }8 Q3 b3 \9 A: D4 ~( Z
  12. #ifndef __DRV_USART_H__+ u) C) P1 K0 m" I; N/ J0 w
  13. #define __DRV_USART_H__5 y- Q- c+ n' n6 C1 I
  14. ) l! d' P* Q- w# I! U7 q- q
  15. #include <rtthread.h>: |3 f( ~9 }( O0 s0 Z
  16. #include "rtdevice.h", T0 V+ y- e% r* a. v
  17. #include <rthw.h>1 L* B4 a% ]9 M# [& v# |: t
  18. //#include <drv_common.h>6 v" S+ w- J% l' H4 }
  19. //#include "drv_dma.h") D& k  s% C$ N7 ~; h* N
  20. #include "uart_config.h"
    + g0 Y; a7 |) I0 `) i6 ^5 ~& i, j
  21. #include "stm32f1xx_hal.h"
    - p; P! k4 J- g, i

  22. / Y: P$ ~' [: G5 K- x  R8 v/ R
  23. int rt_hw_usart_init(void);! |3 o+ W. X- X  U+ q2 p
  24. 5 E: i' m. l# B. Z- k5 k+ Y+ J
  25. #if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) \% i5 `: B& @8 L2 q4 M
  26.     || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0)
    & e0 T' S4 I7 A% u4 K  t
  27. #define DMA_INSTANCE_TYPE              DMA_Channel_TypeDef6 N, b# `( M; B2 E6 O# w5 y9 S
  28. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7)( u$ S  }/ I( w, [
  29. #define DMA_INSTANCE_TYPE              DMA_Stream_TypeDef0 K6 B' Y! \: F+ B/ ?
  30. #endif /*  defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */6 n( N4 H1 c9 X

  31. $ G0 U/ L/ [% @/ T% L  e$ a0 S, i9 M- W
  32. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) \1 P2 K. |& h& d' _
  33.     || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0)7 }% N# j% D8 z3 H
  34. #define UART_INSTANCE_CLEAR_FUNCTION    __HAL_UART_CLEAR_FLAG
    8 H# V0 @; W3 [4 S  G
  35. #elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7)7 b8 X1 r+ _. V+ o7 b: G3 i
  36. #define UART_INSTANCE_CLEAR_FUNCTION    __HAL_UART_CLEAR_IT* [) ?- K  H3 o% m# Q
  37. #endif
    3 a  C4 r/ f2 ]3 J# j$ L) C

  38. * `1 H: p6 l$ K; r9 J. s5 m
  39. /* stm32 config class */- o+ e' c( d! q. U* r" }: K: p
  40. struct stm32_uart_config+ @- @/ x" [1 v8 H8 a, |: g
  41. {; P% E  p9 p8 w; L1 n# d
  42.     const char *name;6 [3 m$ N' u/ E' g
  43.     USART_TypeDef *Instance;
    * v- z$ i  O: @: f& B
  44.     IRQn_Type irq_type;  W0 o0 {2 B7 m+ d- _
  45.     struct dma_config *dma_rx;! V& _- A0 [  n& B. W
  46. };
    . l8 q% r" h# o# ]" I) \

  47. 8 v% \* }6 J; S! H: B/ Q: I
  48. /* stm32 uart dirver class */9 e' p) o& d6 H; O5 ]( c8 V) _
  49. struct stm32_uart3 S0 L3 N; b1 W( [
  50. {9 ]1 Z/ n& b! {, N, i+ Z0 ~/ @( F
  51.     UART_HandleTypeDef handle;7 S( ?' s% {( U$ p
  52.     struct stm32_uart_config *config;9 v* Y9 w6 i3 T& _6 c
  53.    
    / s3 y, s3 O! A
  54. #ifdef RT_SERIAL_USING_DMA
    - A% D: @& n1 T* d  _, h. a
  55.     struct' Z' z0 E& F4 y% A% Z
  56.     {
    ; C! e, R4 h+ r. b9 X3 ?7 v' J# C. D
  57.         DMA_HandleTypeDef handle;
    + O9 G+ q/ r6 U  j" j; s$ z
  58.         rt_size_t last_index;
    ( |+ l/ T( F0 ?% s! w
  59.     } dma;% r: [3 D7 X) L" ~! J- Y# b
  60. #endif
    4 ?* {  q8 ^9 X) _' j8 K- i
  61.     rt_uint8_t uart_dma_flag;
    0 n3 a( [% O9 c2 i
  62.     struct rt_serial_device serial;
    5 N8 U9 ^- [2 h6 I
  63. };
    1 Q3 V# {$ k, g! o& p: r5 j
  64. 0 O& @! L4 C7 J& L
  65. #endif  /* __DRV_USART_H__ */! |* }0 a8 |' M7 H
  66. 4 M+ Q' ?1 Y9 I$ ]9 H" o1 [
复制代码
drv_usart.c
/ s/ o/ a" Q( ~' n1 A
  1. /*
    3 _+ }* l, }" W5 v- @" I
  2. * Copyright (c) 2006-2018, RT-Thread Development Team* L9 e* k1 {4 h% _
  3. *4 M$ X1 @& Q7 B0 O/ h8 ?8 Z
  4. * SPDX-License-Identifier: Apache-2.0- C6 M4 F$ d- v0 W
  5. *
    & R( t8 l) u! O, G8 U- ]9 Z0 j& v
  6. * Change Logs:- T: _. c2 J0 s
  7. * Date           Author       Notes
    & R5 v2 R% @2 e. T
  8. * 2018-10-30     SummerGift   first version( v8 W! v4 ^' f/ ?) F6 [
  9. */, a9 I5 w, q2 [# U4 ^
  10. 1 m  F9 A( I& T% U7 F0 X
  11. //#include "board.h"" ~1 {, o) g* y
  12. #include "drv_usart.h"
    " ^0 S1 A. z# P  D
  13. //#include "drv_config.h"( ^. @: D' O+ Z5 F6 q
  14. : ]7 h/ C9 q! i( E4 L. G  s
  15. #ifdef RT_USING_SERIAL! w5 G) V# u" \* @: G' t# `

  16. / ^$ u3 v" m1 W2 L
  17. //#define DRV_DEBUG
    " F- A. s7 I* ~( ^8 j
  18. #define LOG_TAG             "drv.usart"
    0 ^3 M7 D! i0 `
  19. //#include <drv_log.h>
    9 u/ k( f- k3 p) T9 |
  20. 2 R7 T  `# f) a2 l& p8 t7 R
  21. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) \6 b# r  M6 J! X. s) f
  22.     && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_LPUART1)
    " p5 X3 y: F( J( J( m
  23. #error "Please define at least one BSP_USING_UARTx"# B$ S  L# @: v- K, x" _9 j  B: X+ v' g
  24. /* this driver can be disabled at menuconfig ? RT-Thread Components ? Device Drivers */
    6 ?5 Y; [9 m2 Z, w0 X
  25. #endif9 _, F  v2 s) S! @# n
  26. 1 Z: P6 q' y; r9 Q
  27. #ifdef RT_SERIAL_USING_DMA8 r) k0 }$ V' X
  28. static void stm32_dma_config(struct rt_serial_device *serial);
    % x" R% t* ~- O( n4 H9 I# K3 _
  29. #endif8 R3 t" h8 \) j  U: l
  30. % `1 a- G) {) z0 \  q7 {5 X! ~
  31. enum9 D# O5 O- |" z* c& F& q
  32. {/ z5 y' U0 k/ h" V2 L! q
  33. #ifdef BSP_USING_UART1
    ' e! t7 `9 ]1 e
  34.     UART1_INDEX,
    $ y6 P* `" `- |" a
  35. #endif
    6 H* K, S8 h6 `# P. q
  36. #ifdef BSP_USING_UART2
    1 B& }( }* I; z' Q) J
  37.     UART2_INDEX,
    - m+ Z0 i! X* }( g5 S% U% h# Z3 l
  38. #endif+ v3 K7 }. l9 X9 c4 z
  39. #ifdef BSP_USING_UART3
    2 W3 ]4 Q9 w8 y! ?" }9 {
  40.     UART3_INDEX,% |4 d/ n( `  h, g+ D: D
  41. #endif3 I' `- L) W" M) g
  42. #ifdef BSP_USING_UART48 [2 Y1 Z8 \6 s1 @( F- x: }
  43.     UART4_INDEX,
    - R' L+ o  t, I4 C9 P1 |4 r$ X
  44. #endif
    0 R: c) h+ T( g+ y# @* f9 |
  45. #ifdef BSP_USING_UART52 K/ A! F' S- }
  46.     UART5_INDEX,
    & I. v( k9 M# o+ _
  47. #endif' b* O7 F+ E; G
  48. #ifdef BSP_USING_UART6) |3 d: X4 m7 a& X
  49.     UART6_INDEX,& y4 @" \4 Q" s3 Q. Z
  50. #endif; c9 ?  u4 A, F7 W6 ]$ e9 X
  51. #ifdef BSP_USING_LPUART1
    ; D# J$ \$ N* e- }$ G
  52.     LPUART1_INDEX,( Y8 n9 p  {( Y$ H" ^1 v+ f
  53. #endif) B0 m: D( F6 i
  54. };
    $ J$ O: p) l. e" b* [  t+ y5 u; t# B

  55. + K8 p& @5 u/ E8 D# Z5 Y) ^* o
  56. static struct stm32_uart_config uart_config[] =7 \; g/ K# V. z# Z3 I) g2 }
  57. {
    4 D- V2 r( ?7 m! G8 K
  58. #ifdef BSP_USING_UART1* O( u2 u; h, y' t. d6 n  z0 U
  59.         UART1_CONFIG,5 s# ?# |" C) d' s
  60. #endif
    % M9 W6 l  D) p8 q, |  B. C
  61. #ifdef BSP_USING_UART29 n5 Y+ _) p+ v! i# o+ @
  62.         UART2_CONFIG,, O. `  }( V: U) |2 f  {
  63. #endif
    3 o2 F2 w4 m: d7 g1 `+ k# [" S- w
  64. #ifdef BSP_USING_UART3+ d& y5 _6 _$ ^- p
  65.         UART3_CONFIG,) W/ m* P! \. u6 z
  66. #endif1 b9 z; C  L" L2 X6 Q; H
  67. #ifdef BSP_USING_UART4# r' P, {; E" l
  68.         UART4_CONFIG,; ~. U3 R6 w1 F7 ?1 P: _- w
  69. #endif- D0 c% W7 j; Q9 ~: L( k" r" s: U$ N8 _6 t$ O
  70. #ifdef BSP_USING_UART5
    $ C) F2 K8 ]$ J; ^
  71.         UART5_CONFIG,
    7 o2 F+ g- i* V4 R7 e' ~
  72. #endif8 r- K" i+ s8 J* v
  73. #ifdef BSP_USING_UART6# k! c3 U" M" M9 l9 k( |) d, s
  74.         UART6_CONFIG,: Z) p4 V+ |, m4 {0 d
  75. #endif9 r& G' b; Q9 n  s$ O+ E
  76. #ifdef BSP_USING_LPUART1
    ! q4 ~6 d/ O/ z+ e5 d
  77.         LPUART1_CONFIG,( d( }( X  U# L) o! H
  78. #endif
    * h7 b. Q' x3 y. _9 E
  79. };
    . I2 m, E( \9 t  @: C

  80. , j. _1 K+ G6 U. [; k2 N/ ?" f
  81. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
    ( f7 j8 E$ ]  u  l: y  p

  82. & B2 C9 b  I/ O
  83. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)9 X$ [5 M3 P$ W0 e) P
  84. {, Z& ?+ N5 ~1 D+ n3 P5 o5 B
  85.     struct stm32_uart *uart;* Z' j) z- Q! ^
  86.     RT_ASSERT(serial != RT_NULL);. c  q; k9 C. r+ Q  T6 w
  87.     RT_ASSERT(cfg != RT_NULL);  O1 f8 w- l) U
  88.     uart = (struct stm32_uart *)serial->parent.user_data;
    # V6 s; J  {+ L
  89.     RT_ASSERT(uart != RT_NULL);, }" m& x! g- S1 `0 ^

  90. ! B9 X+ A$ \. O  |; |
  91.     uart->handle.Instance          = uart->config->Instance;% p: y$ Y9 _, `6 X8 P( w% u
  92.     uart->handle.Init.BaudRate     = cfg->baud_rate;5 B% T: Z8 n; Q* M3 `5 _& v! ^
  93.     uart->handle.Init.HwFlowCtl    = UART_HWCONTROL_NONE;
    ; i* |! l/ w, v. V# h- W. v
  94.     uart->handle.Init.Mode         = UART_MODE_TX_RX;, X4 C" a; ?1 S6 r% R! x
  95.     uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
    / i7 A# O8 D7 g( j
  96.     switch (cfg->data_bits)
    + i; ?) N) D: t& I! U2 p( \
  97.     {5 ~3 e6 Z" P. s7 G* `$ J
  98.     case DATA_BITS_8:& l% y$ O. V' c; r- F
  99.         uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
    " r  Y6 ]- j0 S
  100.         break;
    # s5 S. P7 ^) w6 N' A
  101.     case DATA_BITS_9:- i6 ^8 n5 Y& E( z2 J
  102.         uart->handle.Init.WordLength = UART_WORDLENGTH_9B;) F/ ]3 }* m0 Z# D$ l2 B; A# @  ~
  103.         break;
    4 _+ i4 H7 @' {: A9 k* ^
  104.     default:
    ; L9 s' p/ e/ d6 B8 s5 \
  105.         uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
    . y4 a% ?; l5 |5 B
  106.         break;4 |6 N# k3 i3 I0 p
  107.     }& K; ]; l& X8 j* @' |) W
  108.     switch (cfg->stop_bits)
    : l. k" B& d; ?& ?0 c4 q
  109.     {$ Y7 \$ r/ M$ @' B* x) q+ m# y
  110.     case STOP_BITS_1:5 e3 b/ t, S3 J' t1 F  |& N) M
  111.         uart->handle.Init.StopBits   = UART_STOPBITS_1;8 V& q7 b( }! U6 `% g4 _4 C2 M
  112.         break;8 [9 M7 a8 N! w, ~, T$ B
  113.     case STOP_BITS_2:6 {! `: ^* u) Y' Y% {
  114.         uart->handle.Init.StopBits   = UART_STOPBITS_2;- j9 E6 T1 T0 C% y1 \
  115.         break;
    8 v4 R, L2 m2 G$ X0 p, i+ A2 W7 D
  116.     default:$ b, E1 M: n9 B! c, F- i
  117.         uart->handle.Init.StopBits   = UART_STOPBITS_1;  ^" u6 A8 ]6 s* u/ S0 a
  118.         break;
    $ b* c. r, L3 Y7 j
  119.     }9 C4 u5 L1 v9 b7 n" I* |
  120.     switch (cfg->parity)" \! e6 r, E  g" K: f
  121.     {
    * D( v( A: |7 }6 M; p
  122.     case PARITY_NONE:, i8 g; y* W! J7 k+ D/ z3 D, ^; u
  123.         uart->handle.Init.Parity     = UART_PARITY_NONE;
    & M1 `" p% X9 W  L4 n0 f
  124.         break;
    / ]5 e- c, N8 R6 i. K8 n# p7 p
  125.     case PARITY_ODD:# ^2 F7 f4 a/ ]. i5 M$ C* Y; }: X( t
  126.         uart->handle.Init.Parity     = UART_PARITY_ODD;
    " L2 V2 D# e3 v; ^& _/ ]
  127.         break;9 v. F+ }% h& s( _: `
  128.     case PARITY_EVEN:' e/ x" B  Z  ^# }1 J/ R
  129.         uart->handle.Init.Parity     = UART_PARITY_EVEN;5 q- a7 }. L& s! A( o: ^3 C
  130.         break;. S1 ~3 x7 w* F3 |3 l8 F2 G
  131.     default:1 `+ J$ v, \, m9 A
  132.         uart->handle.Init.Parity     = UART_PARITY_NONE;4 f: Y4 ^8 D9 M
  133.         break;
    - q, Y1 n* M1 |8 }8 W
  134.     }
    $ C8 ~! D! }" Y! g

  135. 7 K3 n% B  s, N$ W! L/ w
  136.     if (HAL_UART_Init(&uart->handle) != HAL_OK)+ M, Y. }5 t. B+ J4 q  x
  137.     {
    9 K( l" ~! a5 R2 G$ B- r
  138.         return -RT_ERROR;
    . Q$ R4 [5 L6 o7 {& w2 R
  139.     }' l2 l% Y" w. T# q/ Q
  140. + m' _3 ]$ H& H6 I8 j% ~
  141.     return RT_EOK;
    4 u' C7 u. w' T$ w! J0 l
  142. }
    ; j$ F$ u7 J& M

  143. . a; G+ a" {4 d" m1 A  u
  144. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg), l- H/ R( Y+ T$ g
  145. {/ V- ~6 T% R# X4 ]% m1 J( y( n( s6 y- N
  146.     struct stm32_uart *uart;7 g& A( d% G& F  c
  147. #ifdef RT_SERIAL_USING_DMA
    # {& z" @7 m/ J8 ^! {. x1 X
  148.     rt_ubase_t ctrl_arg = (rt_ubase_t)arg;  s6 w& V5 a- B2 J1 B" `; [! r
  149. #endif
    & y( D8 V! W/ T5 G
  150.     + P6 J6 y/ ]) m" }. Q
  151.     RT_ASSERT(serial != RT_NULL);1 K/ r9 X: {, B+ N2 K; f- s6 m, M
  152.     uart = (struct stm32_uart *)serial->parent.user_data;7 x/ c5 F' z: c; o/ W$ R
  153.     RT_ASSERT(uart != RT_NULL);/ [0 p, B" W3 z2 O3 u1 `" a: L

  154. . d, J7 p  q5 Y" R  J
  155.     switch (cmd)! k; `9 J6 D& |- [6 h7 w. C
  156.     {" [$ w7 Q& o' j
  157.     /* disable interrupt */
    7 n. o3 V/ M6 w& y
  158.     case RT_DEVICE_CTRL_CLR_INT:7 w4 s9 L( i# m9 d/ j" n( U
  159.         /* disable rx irq */
    & K& G6 ^+ g) V7 F( h
  160.         NVIC_DisableIRQ(uart->config->irq_type);, K5 F. Z6 C$ x' X' ?
  161.         /* disable interrupt */
    ; y$ }0 Y8 D: ~" M. B: q( }6 S$ y
  162.         __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
    . F2 c  R0 v4 x* _
  163.         break;9 Z+ t& q2 n; m! ]6 N' x% p; P* f
  164.     /* enable interrupt */. w/ i/ ?# L$ J( E7 o
  165.     case RT_DEVICE_CTRL_SET_INT:
    ) l3 ~+ m7 Q+ H2 {0 G* w
  166.         /* enable rx irq */
    " E, S6 C+ V! r1 {& X
  167.         NVIC_EnableIRQ(uart->config->irq_type);
    6 O4 M$ g, h; l! P. ~) h
  168.         /* enable interrupt */
    ' v4 b/ O* _5 ]# Q' C
  169.         __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
    2 s% p/ [) P* _& X0 G
  170.         break;9 H$ e0 J3 @: A4 I/ a' u
  171. # M3 }! f1 k3 I$ u
  172. #ifdef RT_SERIAL_USING_DMA3 x* w1 I( a4 u8 s3 m0 D7 x
  173.     case RT_DEVICE_CTRL_CONFIG:9 ^( I+ x* ], L& f0 F
  174.         if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)% |' U% u, s9 S$ A0 T" U* S
  175.         {6 s- Q! f' ]4 M! w
  176.             stm32_dma_config(serial);+ _" D' l% F4 A/ z' w4 a4 Z, \
  177.         }" E# D8 T9 n+ F- {
  178.         break;8 \8 a( Z; q/ M0 m( w
  179. #endif
    # s8 Q9 L5 q' i# y
  180.     }8 f; ~7 O% D. X/ X8 J
  181.     return RT_EOK;# O' _9 A* @: P8 Y' B
  182. }
    & J- Q( u" Q* U3 p/ O3 ^) O
  183. $ o% t9 i) S/ d: b$ f' n! d
  184. static int stm32_putc(struct rt_serial_device *serial, char c)
    , Z0 v+ `' t; R6 ?! {! p
  185. {
    % H& X9 j: f7 d- [* K; H
  186.     struct stm32_uart *uart;
    " S% q# G1 f( o; i* T. s9 H
  187.     RT_ASSERT(serial != RT_NULL);# }  S8 G( M- v  {1 \: f

  188. - M- C% C" F# r  D6 }* D/ |
  189.     uart = (struct stm32_uart *)serial->parent.user_data;
    ( C  u3 n# i: t. U, f( |; y
  190.     UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
    ' Q( v$ c! y0 G* p4 p
  191. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
    + x5 `1 T& a# U/ a% `3 u& f# F
  192.     || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
    ' ?* @1 e# @+ [; W
  193.     uart->handle.Instance->TDR = c;
    0 j! k0 F8 f$ ^, [
  194. #else7 R' ^0 V. Z8 ^- i7 r3 M, j
  195.     uart->handle.Instance->DR = c;! a, u3 N9 w' U) h8 V9 E, A
  196. #endif: V4 h8 [- h% a' T5 b
  197.     while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
    6 \6 v' M8 D! E2 q+ A
  198.     return 1;; `9 u, e6 \$ S
  199. }
    / r/ O! V" |6 J1 D$ y6 f
  200. ! I+ {$ p6 ]  I! V. e; |
  201. static int stm32_getc(struct rt_serial_device *serial)+ h( I2 x( P! h$ n! W/ D" S5 u
  202. {, J. L3 ?4 B0 r+ ?
  203.     int ch;
    1 J8 p. d# `) E  n
  204.     struct stm32_uart *uart;
    6 u4 n# e1 E0 S8 m5 f* N' ^# m- T4 e* {% ~
  205.     RT_ASSERT(serial != RT_NULL);0 \2 M9 g& k$ Y+ b
  206.     uart = (struct stm32_uart *)serial->parent.user_data;/ @- W0 M: i. c& k& V" i
  207.     RT_ASSERT(uart != RT_NULL);
    3 z- O' o& _1 A. q/ p( g

  208. / L/ H6 ~3 Q# g- F3 R, S
  209.     ch = -1;) }! q8 ], j! J$ v& C- R
  210.     if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
    9 |5 }. J) K8 o/ x
  211.     {
    3 O- Z2 y( W  R! U0 K. v
  212. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \8 y3 u- c4 ~' K. Y7 V6 i( \: g
  213.     || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)$ \5 r' {2 E2 P9 y/ _% P7 ]0 {
  214.         ch = uart->handle.Instance->RDR & 0xff;8 `+ R3 D6 }$ L9 H* U( I
  215. #else
    & [  F; T' h8 E
  216.         ch = uart->handle.Instance->DR & 0xff;! w5 J2 e3 d& J. G" \2 ^( i
  217. #endif1 j9 z. A) c" ~0 p- l( S
  218.     }
    ' X4 J* ]. I* d( i8 k* I) a
  219.     return ch;  Q( {1 q0 k' ~" l
  220. }
    " u& Z) G" R4 G' C# L

  221. . U% u) [: X" W* u8 \% X/ B8 _8 D
  222. static const struct rt_uart_ops stm32_uart_ops =0 q/ R5 f4 }) p! _! M. ?6 W% c+ C
  223. {
    * L$ x% T2 g$ k& Y3 \! o# \& `
  224.     .configure = stm32_configure,) j+ [' L8 Q1 H2 M" C6 H# J& x
  225.     .control = stm32_control,
    5 y9 J# w6 u3 N: M- b0 t" I* Q
  226.     .putc = stm32_putc,0 y5 l) ]; k! N0 u7 ]
  227.     .getc = stm32_getc,4 I: i! h5 }0 I+ A4 ~: b
  228. };
    $ N. U2 o2 y( K  {& z6 G; R' `
  229. ' |& I/ K! e/ U3 a- B: w+ _
  230. /**
    7 n7 P& B. Y# u; p  c+ q0 u) [
  231. * Uart common interrupt process. This need add to uart ISR.+ v" j! `8 G" |' \
  232. *
    / B& ~- Z/ t1 r+ a. Q
  233. * @param serial serial device
    0 H' O: I1 X$ q7 ]# f: f/ Q
  234. */# `* g' L7 W0 X  \' G. `
  235. static void uart_isr(struct rt_serial_device *serial)* B% R: Q+ [' I) [' R
  236. {: |6 J: b0 l$ z- h! Z9 L, A2 I" \' ]
  237.     struct stm32_uart *uart;& ~5 o6 h) e3 Y# u
  238. #ifdef RT_SERIAL_USING_DMA  q8 @  q* q" [) @3 v
  239.     rt_size_t recv_total_index, recv_len;
    % |8 _) @# i# x! n$ @
  240.     rt_base_t level;
    2 D# X8 Z  W! X3 N; P% y8 G, ?
  241. #endif9 R1 [, l9 N. r# U( u7 Y) [2 k3 u$ M
  242.    
    8 F) g, L! @& c% x- m
  243.     RT_ASSERT(serial != RT_NULL);
    " V: \8 B* s% v( t4 T) B1 ]

  244. , D* B; j+ O4 K+ ?- X5 A
  245.     uart = (struct stm32_uart *) serial->parent.user_data;/ S* E( d; X1 v
  246.     RT_ASSERT(uart != RT_NULL);
    4 S5 C+ P, g( b, n4 Q
  247. & a$ m9 L2 I5 {! n5 g
  248.     /* UART in mode Receiver -------------------------------------------------*/% l( [# S2 v8 S7 ^/ O2 g, g
  249.     if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&- b4 j5 t3 _6 T+ v6 r
  250.         (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET)); M6 n9 h. O: I& W8 S: H! t
  251.     {8 m/ C8 q' F( k
  252.         rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
    ) @$ @3 J  t1 r- T; K1 U
  253.     }' P. F3 c2 B9 S% c, N& |" m+ A
  254. #ifdef RT_SERIAL_USING_DMA
    & t) m. y& ^" [, f
  255.     else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) &&' j. Z; B3 R1 @2 q
  256.              (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))% V; D/ K+ k# k' r" P
  257.     {
    * K# R* N2 H7 {, L
  258.         level = rt_hw_interrupt_disable();& c) R8 z/ ?4 \! k8 F7 |
  259.         recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle));: ~1 {) J+ z6 I' H' f; f) t
  260.         recv_len = recv_total_index - uart->dma.last_index;
      L) T* a8 u- U( H% R  S, p& ~
  261.         uart->dma.last_index = recv_total_index;
    2 P- m/ W  X3 O  g% o; G- X
  262.         rt_hw_interrupt_enable(level);1 p3 X8 K+ {0 R* T% z6 ~
  263. # \% r4 k6 q" v
  264.         if (recv_len)
    8 h/ M0 I5 D5 @; A. d" f
  265.         {: W6 q- D& Z& `
  266.             rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
    1 {$ O/ ~) Z! k8 g6 Y/ n3 d8 o
  267.         }
    / g& P) G( b: k. J
  268.         __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
    # H6 H1 c: w( S% m5 E
  269.     }6 P2 J% D2 W( X+ o" U8 }% Q2 s7 S
  270. #endif) y2 \$ J* R- J8 o$ ]0 ^7 z
  271.     else7 U% B0 q3 o# F; V
  272.     {
    0 w% k' Z. g& P( E  @5 g
  273.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)2 e. z7 e4 P- i  y  f8 Q
  274.         {- {* k- s# T7 o  J. H" G
  275.             __HAL_UART_CLEAR_OREFLAG(&uart->handle);
    6 ?7 n* m  p  m9 z% F& P9 H
  276.         }
    5 o% x5 X+ b6 _6 f0 a# C
  277.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)! @( d* x0 n: t; F  _
  278.         {
    2 r! T: B! [  ~: v
  279.             __HAL_UART_CLEAR_NEFLAG(&uart->handle);' L# \$ D1 N0 E( P  f
  280.         }
    % `! F# O' S$ U
  281.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET): S7 P: Z9 W7 y8 D
  282.         {
    $ k' p8 ?& G9 x: H+ I& Z( j# O. h4 ~
  283.             __HAL_UART_CLEAR_FEFLAG(&uart->handle);5 h% Z9 S. p2 S. p7 P7 \" h1 o& L# n) o1 ]
  284.         }
    3 A  o6 l5 o% A
  285.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)7 H1 s, r' L  t8 W/ l  `) q
  286.         {* D  X- |0 V7 `! y+ {" g2 H+ V7 T
  287.             __HAL_UART_CLEAR_PEFLAG(&uart->handle);$ Z7 A  }2 O% y3 `. A* g( s
  288.         }
    # U0 K; C6 B& P( p$ G! D
  289. #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \  |! B" K$ z$ h& [* u# c
  290.     && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7)$ R9 E0 U' p  r/ A1 S
  291.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)0 t. D. s# z( I: N0 i9 B/ L
  292.         {
    9 |9 \3 t  i) Q9 a2 O) G
  293.             UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
    " }! y$ B- r8 X* q1 b" g. C+ k* A& m
  294.         }
    ) ?# c; }  [5 T3 A4 L
  295. #endif9 [) S2 d5 _9 s5 t* z# R
  296.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
    + E1 [: O) Q$ l! H: q
  297.         {
    5 t' R% J/ o& }, m; @' D
  298.             UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);; z* S2 a/ F. ?+ I
  299.         }  F+ K6 s" e1 r# z: V
  300.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)& K% e% }( R0 L& s- _% s
  301.         {
    2 ^7 c" m' H# O: q* C  k- N; g1 M- A, C
  302.             UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);* C% t+ O$ P: X; n& r3 W
  303.         }
    # _" z* w6 E, V! I
  304.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)# |* H0 B' A& k
  305.         {
    5 E' K9 F2 h! o/ |4 c
  306.             UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
    . b& ~! r9 m/ D! }6 y
  307.         }- T3 A% ~8 R" T) O5 M2 T
  308.         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
    8 s0 J7 h1 Q4 \" R: P2 j5 k* @
  309.         {
    ) u) D/ K4 W+ ^. _
  310.             UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
    & u4 g# c& W$ p% Z
  311.         }) j% P# t2 N" F3 G8 P
  312.     }
      a( _2 m4 R1 q
  313. }
    ! Q0 U7 K, @4 I4 ~, S1 g" o9 e
  314. 6 y1 V) j% q2 e8 B* Z- w
  315. #if defined(BSP_USING_UART1)
    9 m9 z: Z3 H5 S# v9 l4 C$ }6 A
  316. void USART1_IRQHandler(void)
    5 l5 b8 }1 J) ?9 H$ e0 U5 @# h" [
  317. {3 B; x! j8 s' {; ~' b
  318.     /* enter interrupt */
    2 X- o# f- A- z8 z0 y  A
  319.     rt_interrupt_enter();
    & W( w/ g3 w8 C1 b, x
  320. " C4 t  b& B$ @, A4 I
  321.     uart_isr(&(uart_obj[UART1_INDEX].serial));. l+ m" x1 F  q1 k$ \! S
  322.     + h) M- [. z7 _5 T
  323.     /* leave interrupt */
    $ _+ Z6 ?3 s" {1 m
  324.     rt_interrupt_leave();* e9 w% S5 i; t$ ^
  325. }
    0 ]: D9 W7 J2 g& {& D! B2 k
  326. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
    ' c- m+ @6 o. ~4 e! A
  327. void UART1_DMA_RX_IRQHandler(void)% Z! u5 Z2 [/ j3 W& F; C
  328. {1 t, [2 H3 ?) |2 [% a) b3 n
  329.     /* enter interrupt */$ E! |4 G6 Z# N9 j
  330.     rt_interrupt_enter();; ], b0 x8 u% D9 ]/ G

  331. # ]9 S, \8 R" j# C' K
  332.     HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma.handle);
    ( x4 M: K' _  F8 Q3 ]7 R6 M
  333. + m' p5 a/ Y& x, |- ?; r
  334.     /* leave interrupt */
    6 r$ u- Z: N& B
  335.     rt_interrupt_leave();: H/ R( F* [. r& a' p
  336. }
    % |; |$ K5 e* T2 B: G/ l( @
  337. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */: U8 v; |  \* ?4 h
  338. #endif /* BSP_USING_UART1 */8 y8 ~# g  {0 m" X
  339. ! N& R7 i, Y' l) v2 M' r
  340. #if defined(BSP_USING_UART2)6 X, |; O$ a$ C; P# v
  341. void USART2_IRQHandler(void)2 j' k+ S/ W: \. W
  342. {
    ) ~7 G5 o7 _: c, s
  343.     /* enter interrupt */
    . b: ~! ]5 d  I/ S7 ]( W5 n
  344.     rt_interrupt_enter();
    ' X: R0 L9 I" K: U! G4 s* |
  345. 6 v4 ~1 n& `' e" R6 @5 V; ]# \
  346.     uart_isr(&(uart_obj[UART2_INDEX].serial));
    " q) Z0 t0 c. Q

  347. ) G9 ^# S/ O5 O5 u
  348.     /* leave interrupt */
    ! p; K) U! d3 A) x
  349.     rt_interrupt_leave();
    / S8 O5 `, Z) H
  350. }
    ' n: ?$ z8 d8 M5 T, A& y( Y; I- Y
  351. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
    " x8 H( L3 L. ?# `) f$ ^" r& o6 r
  352. void UART2_DMA_RX_IRQHandler(void)
    5 H7 I. a% X( Q
  353. {  N. ^3 I9 Y. f$ V- J: @" w
  354.     /* enter interrupt */7 x/ S5 S1 ~6 b4 {7 w) I/ ]
  355.     rt_interrupt_enter();# ?) W% c7 H/ i+ \! `- P+ o  ]5 i' _
  356. ' B7 G( f$ J5 }* N6 F4 O2 R" x
  357.     HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma.handle);
      D: R2 s8 @# h9 b

  358. % h( ?  j* i  Y7 ^5 P" v# d
  359.     /* leave interrupt */
    ! V0 Q$ K; m7 ]7 K' ^7 _9 _% x
  360.     rt_interrupt_leave();
    & s, s2 v; w7 t5 h4 b4 M
  361. }: Y. K8 v0 v7 D
  362. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */- ]& q! I: B% W% T7 L1 m4 m
  363. #endif /* BSP_USING_UART2 */
    ) z- V# Z/ h6 H% H$ q8 P

  364. : i+ n3 P, p$ N3 k- c8 q- x8 t
  365. #if defined(BSP_USING_UART3)' z( z% u8 y- i4 g
  366. void USART3_IRQHandler(void)2 z0 B  A1 e; N& {0 ^% r
  367. {
    & o# i& ?7 m. _0 \; `9 u
  368.     /* enter interrupt */. w9 h3 R, a  L6 s$ h; |. }8 c
  369.     rt_interrupt_enter();/ p( d- w- e; L0 \% S5 z: [

  370. * O  O# d  U) W$ Y4 T5 x. p4 a
  371.     uart_isr(&(uart_obj[UART3_INDEX].serial));5 ]6 M- o3 i2 c2 c
  372.       N1 v2 ^% a- E
  373.     /* leave interrupt */; z$ d8 `  h8 [% t
  374.     rt_interrupt_leave();( Q% q) d, P& x- F5 f0 q
  375. }
    7 i% t, Q5 J  R' R' b6 g
  376. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
    . r8 c2 O( A- E+ V4 L# O
  377. void UART3_DMA_RX_IRQHandler(void)
    / t% E. v3 b. Z! e7 Z
  378. {
      P  f3 b+ j$ p% F
  379.     /* enter interrupt */
    ' x. M3 j: @- F) ~* r* Q
  380.     rt_interrupt_enter();; ^( N& ~7 t; Q5 I
  381. 2 q  R7 G" u: E' y# e
  382.     HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma.handle);
    3 Q: ?% H8 T9 N0 _; P& z9 Q8 g
  383. + _/ G8 t! P9 ?* c) l1 Z
  384.     /* leave interrupt */
    + h8 g7 s3 x  n( {
  385.     rt_interrupt_leave();$ U( c) ]4 \! a
  386. }
    & Y) _8 z( @( T; R# p
  387. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
    * s. G; D" g1 A& u1 T
  388. #endif /* BSP_USING_UART3*/
    ( t6 g$ H" I2 G4 M8 p

  389. . s- b9 O$ }+ S1 g/ \, I+ t* a
  390. #if defined(BSP_USING_UART4)0 a7 ^1 i. \* _- W  l! i/ _# c
  391. void UART4_IRQHandler(void)
    $ ?/ q6 q7 q. c6 E+ I7 [& L1 L  C/ v
  392. {
    / X9 |7 n' m% H0 m9 i  W
  393.     /* enter interrupt */
    4 A/ z. C: f, W/ B" S
  394.     rt_interrupt_enter();
    - C1 Z* t" i, R9 Q& X1 P% |8 \
  395. + _; z# L3 d! `2 ~
  396.     uart_isr(&(uart_obj[UART4_INDEX].serial));
    5 I' r  |. P; F4 e
  397.     - _/ w& H9 r9 n
  398.     /* leave interrupt */
    + c1 f7 u+ Q$ D
  399.     rt_interrupt_leave();# L8 U- E2 k) z$ `8 I
  400. }
    / w4 V5 ^4 ]- u
  401. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)' m2 Z/ G0 U2 Z9 |/ u) B2 b
  402. void UART4_DMA_RX_IRQHandler(void)4 ~, \& o' a& t9 j& c. V
  403. {# Q2 i7 W; w( b# Y1 L, F
  404.     /* enter interrupt */
    $ N, i/ v  ~+ G2 Q, F
  405.     rt_interrupt_enter();
    ) B6 ]( j" Y' o$ p0 p, K

  406. ! Y9 P; S$ o5 J: V
  407.     HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma.handle);0 _( q( g, @/ h6 m

  408. 7 `6 M- I: d6 l
  409.     /* leave interrupt */) n$ J( ]3 n! ^1 ]+ X, C& f* d
  410.     rt_interrupt_leave();# ]& h0 n2 }1 u# u+ O' t- p1 b& o
  411. }; j- L2 \# @8 `
  412. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
    0 j; p% @0 J: ]5 v5 [" V
  413. #endif /* BSP_USING_UART4*/' ^. |7 l- @1 Y9 E* K4 y  L$ d. y

  414. 1 X# z* u+ b, A- K) O' F
  415. #if defined(BSP_USING_UART5)- d' e) a8 w6 J' v% i- {* t4 G
  416. void UART5_IRQHandler(void)
    ) m$ k; z& d& u  H( H
  417. {
    0 \. O, e9 S9 a; p/ W! B9 w7 P
  418.     /* enter interrupt */1 z: j0 ^: U6 s1 a0 a" y. D
  419.     rt_interrupt_enter();, H3 E% ~) p1 Z9 U- g9 v
  420. + r$ Q6 E- \8 n" p
  421.     uart_isr(&(uart_obj[UART5_INDEX].serial));; v+ p& E# ~7 n0 H+ Q$ q- e8 ~" ?/ h
  422.     # J! M! H) Q# o! i
  423.     /* leave interrupt */
    - c8 v$ U/ I3 R; `# j
  424.     rt_interrupt_leave();
    0 v0 q/ \& ]% Z' y6 M+ [2 b; D' v
  425. }
    " v' R% P9 s% X) e
  426. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)8 j" ]7 v2 y+ q7 f* H8 z6 w$ A
  427. void UART5_DMA_RX_IRQHandler(void)
    $ p! F+ e  s# `, J
  428. {
    - V6 _; u& L7 e- O( a
  429.     /* enter interrupt */
    ! m% P# r, V- l9 l
  430.     rt_interrupt_enter();
    & d8 V% k0 D& m9 g0 |  d
  431. 2 j  C  j  A( b* B
  432.     HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma.handle);
    & k* x$ Q, x9 G8 C. ?  E
  433. & L/ F9 Z1 }( y( L2 h- u
  434.     /* leave interrupt */! I! e' s. \2 B. R7 |6 q
  435.     rt_interrupt_leave();$ X3 T* ]* F' P0 ^+ T' D- ~3 b
  436. }
    % `3 u8 F3 Y2 w# D
  437. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */: Y1 `- J+ P8 U! z& L& e  q
  438. #endif /* BSP_USING_UART5*/1 s( f! O+ N( R/ f

  439. : Q9 D+ O7 z" C7 X: c
  440. #if defined(BSP_USING_UART6)
    7 U6 k) T. k# l# M6 d( k5 d
  441. void USART6_IRQHandler(void)/ I1 q8 O' c) S! A1 M* m' g6 L
  442. {+ B: N1 n- g0 L1 c2 V) k
  443.     /* enter interrupt */3 M. s8 ?* ]  r3 [
  444.     rt_interrupt_enter();; {) |; o0 J2 u& _5 D+ z

  445. , {! R0 v6 S5 o) m) j5 D& u
  446.     uart_isr(&(uart_obj[UART6_INDEX].serial));
    ! |, _" m. m- S! [8 }2 m/ O8 E# f
  447.    
    ! _( b5 @* Z+ H, }
  448.     /* leave interrupt */6 \" p0 ]) E5 e  O+ J: _. ~
  449.     rt_interrupt_leave();! {6 k& l6 x$ o* ~/ Q- ?; D
  450. }
    8 A# s3 n3 ~; q; i
  451. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)0 G! |! H2 }( k( l# f8 {( g
  452. void UART6_DMA_RX_IRQHandler(void)8 d. D' M# I6 y) I& t  H
  453. {2 s0 D, f0 f9 e5 ?! b
  454.     /* enter interrupt */
    ! q- f6 v5 n1 Q+ n' @' m
  455.     rt_interrupt_enter();% S0 ~3 W4 [/ M1 K8 h

  456. & K0 I- S+ F; N0 n+ ~
  457.     HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma.handle);% p3 ~3 ]6 j% H0 f! P
  458. # k3 o, _# L  e, Y/ c
  459.     /* leave interrupt */- ^& v: S5 U% d+ N9 V1 r
  460.     rt_interrupt_leave();
    ( K. L/ q/ ^1 e0 U- u
  461. }
    7 x1 H8 L+ w; v! Q7 ?" P! Q
  462. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */$ c( Q* a. A) ^; ]+ `" m' z
  463. #endif /* BSP_USING_UART6*/
    ; h, A, ~- W) b% |( ?- q' l* G
  464. * B3 [: n& Y7 F/ t
  465. #if defined(BSP_USING_LPUART1)9 w. o# ?8 K/ B. m$ U
  466. void LPUART1_IRQHandler(void)7 j& X& U% l; L% h
  467. {
    + V) {. X% b# f' k
  468.     /* enter interrupt */  I/ E- m; a; J# g  V3 E
  469.     rt_interrupt_enter();+ o4 |$ d& Q" y4 x1 q5 Y" {
  470. / P$ x; p0 A( G( l+ i4 V" T+ _
  471.     uart_isr(&(uart_obj[LPUART1_INDEX].serial));
    $ M% N$ V# v  L
  472.    
    3 J$ C; c! c2 S2 T
  473.     /* leave interrupt */
    # B8 @8 G, K0 k0 j! c6 L! A# w
  474.     rt_interrupt_leave();/ H' C6 q2 g2 b  ~9 J  D' O8 P
  475. }1 m0 P7 ^; ~  ?8 [8 g" @
  476. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)4 i2 }  x; `7 f7 t! W
  477. void LPUART1_DMA_RX_IRQHandler(void)) j" b% S6 H- [+ \; b4 z
  478. {3 w4 q& p  z4 N# T) {( w  Q. d
  479.     /* enter interrupt */
    + Z# d: ~2 W( J- t3 L2 i; @% ?
  480.     rt_interrupt_enter();9 y; k; O" [1 T* D  @+ J5 I
  481. + O, Y- e- W' B$ {- U: I
  482.     HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle);! l% I* e& m' Z+ i# q
  483. % F4 C; e0 @( ~7 d  }& q
  484.     /* leave interrupt */' l9 \; M: o" Y: U% ^0 p
  485.     rt_interrupt_leave();
    ) I& ]+ {1 N( J  m0 w
  486. }; b, O* o0 O% Y% H# d# Q
  487. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */; o" x- _6 a& _/ k: U
  488. #endif /* BSP_USING_LPUART1*/
    + h3 w7 t7 B# ~1 n7 @; }! M

  489. 7 F7 v# _# N: s) u$ O) e
  490. #ifdef RT_SERIAL_USING_DMA
    1 c# `" [0 h5 U6 H! f
  491. static void stm32_dma_config(struct rt_serial_device *serial)1 k5 j6 m# p# C2 W" O( k5 s
  492. {
    & ]; L* t& b; |# H
  493.     RT_ASSERT(serial != RT_NULL);
    5 B/ x: v" E' J; U& m5 o, K
  494.     struct stm32_uart *uart = (struct stm32_uart *)serial->parent.user_data;
    : S* h7 Q* ^* ]0 N' }2 I
  495.     RT_ASSERT(uart != RT_NULL);
    6 z  V* d- c  z6 `% p
  496.     struct rt_serial_rx_fifo *rx_fifo;
    0 W& U: B3 ?5 l$ a, h0 n: D; z
  497.    
    : F8 U0 [# z1 ~% g
  498.     LOG_D("%s dma config start", uart->config->name);  S1 z  g4 x! X2 V% ]
  499. * Y/ J- _' U0 A! a+ [1 I( _4 Y
  500.     {: A& }8 ~; K5 M/ S
  501.         rt_uint32_t tmpreg= 0x00U;
    $ B' d$ n) C; }, u8 n+ i4 o# G
  502. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \% _& n; @" _! G% O( {. c
  503.         || defined(SOC_SERIES_STM32L0)
    8 ~8 F5 }3 v1 w) v$ ^4 X
  504.         /* enable DMA clock && Delay after an RCC peripheral clock enabling*/5 [: I1 ~4 ~% t) b) G9 v  g
  505.         SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
      }0 y0 \4 A3 D( r0 s/ Y- {
  506.         tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);0 m: O  S! Y/ O. T& @8 ?2 \
  507. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)4 n" ?* N4 _% T4 S% t
  508.         /* enable DMA clock && Delay after an RCC peripheral clock enabling*/& y4 U( x5 [3 s* `8 Z/ D
  509.         SET_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
    3 @! u5 L/ [$ F8 T  i! r( H8 B
  510.         tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);4 c1 l2 e8 d; D
  511. #endif  
    2 u0 b7 k" R4 U" {0 n9 _! c# M
  512.         UNUSED(tmpreg);   /* To avoid compiler warnings */1 ~2 @$ ]0 j% x# B/ G: N
  513.     }' p2 z0 q8 `  q6 t

  514. ( x& T3 h8 A7 ^' b+ N
  515.     __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle);
    ! n9 e; }2 s0 q' m' k  t5 ^
  516. 5 h6 H1 P) f' Z  D; @0 x
  517. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
    ( B- Y. T0 y' b+ D% X
  518.     uart->dma.handle.Instance                 = uart->config->dma_rx->Instance;) `' r$ i0 ~  h
  519. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)6 G  i) c( V3 |9 Z8 _
  520.     uart->dma.handle.Instance                 = uart->config->dma_rx->Instance;, H8 @# u6 B& e( Q' M# Z) V9 [
  521.     uart->dma.handle.Init.Channel             = uart->config->dma_rx->channel;
    . y; M9 s& o( a8 }0 Z
  522. #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
    3 y! \  a) q+ \
  523.     uart->dma.handle.Instance                 = uart->config->dma_rx->Instance;+ u6 C% L( j" n8 j. W! G
  524.     uart->dma.handle.Init.Request             = uart->config->dma_rx->request;4 X/ i, r0 i! h* U
  525. #endif
    5 y! C& ~/ u7 X5 Q& A" f- w8 H- V0 p
  526.     uart->dma.handle.Init.Direction           = DMA_PERIPH_TO_MEMORY;6 I, K0 W6 s1 I& C, b: S" Z) C
  527.     uart->dma.handle.Init.PeriphInc           = DMA_PINC_DISABLE;
    % M7 H- X; F/ S
  528.     uart->dma.handle.Init.MemInc              = DMA_MINC_ENABLE;* Z) b' A% Q8 g
  529.     uart->dma.handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;( }. e; J% s9 x! J& E
  530.     uart->dma.handle.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
    ; t/ s7 r7 Z" P4 T* b
  531.     uart->dma.handle.Init.Mode                = DMA_CIRCULAR;/ L! D5 U5 }6 N, P; Y- W4 S
  532.     uart->dma.handle.Init.Priority            = DMA_PRIORITY_MEDIUM;
    % t4 V- j, |5 Q$ K; N! I6 ?1 o8 U$ F
  533. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)8 Y/ h, b7 u; U
  534.     uart->dma.handle.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
    2 Y' ?$ N/ ?! ]6 |, l
  535. #endif2 u+ X4 t, o5 H5 z+ z) h7 [; Z
  536.     if (HAL_DMA_DeInit(&(uart->dma.handle)) != HAL_OK)
    # z7 `+ a) _8 l, T
  537.     {
    ( S; I3 h1 R& n
  538.         RT_ASSERT(0);8 U! i( G: S( T  i! Z& P
  539.     }! T* @! ?& v" q6 q: W# N8 J$ c
  540. 6 U) k( B* c  y/ `
  541.     if (HAL_DMA_Init(&(uart->dma.handle)) != HAL_OK); I$ N8 X7 Y. K3 u9 H/ @
  542.     {
    + ?, B6 ^, Q8 n* r) `7 B
  543.         RT_ASSERT(0);
    ( o9 {* [+ a6 J2 [
  544.     }
    9 [* y* l. e6 ^) B3 Z) v! [3 r; Z9 I
  545. " y9 l# z/ x/ L0 L" N7 y
  546.     rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
    9 m, Z7 K5 v& U/ C2 e/ R
  547.    
    1 C9 r8 B2 X: u: q* u! p1 B. a# W
  548.     /* Start DMA transfer */. H) {: C$ W5 j
  549.     if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)# [& p# ~* e9 g% _
  550.     {
    8 r  r6 d, n8 c' C/ d/ y% f- O4 e- N
  551.         /* Transfer error in reception process */
    7 g+ I; W# J  e, _% p: X
  552.         RT_ASSERT(0);
    + ]% Q: e' t7 Y1 L# i
  553.     }5 y% L( k5 @$ o
  554. 3 O" I9 g5 M* M, r, P3 c
  555.     /* enable interrupt */! J$ l: q, e; `0 f
  556.     __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
    4 S0 D# X) C2 o; a3 A( C2 T
  557.    
    ) m' q9 M% F* A% @  Z3 }& m) L
  558.     /* enable rx irq */# ]$ w" z3 a/ L# u& P/ _
  559.     HAL_NVIC_SetPriority(uart->config->dma_rx->dma_irq, 0, 0);
    0 ~- Z" f) N8 i: W
  560.     HAL_NVIC_EnableIRQ(uart->config->dma_rx->dma_irq);
    7 q3 K8 ^% l5 X6 T$ t, K# `, R
  561.    
    2 B9 X6 `3 L$ y0 y, \# [4 E% B8 @
  562.     HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
    : H8 u1 |9 g5 ]& y3 [
  563.     HAL_NVIC_EnableIRQ(uart->config->irq_type);3 h8 t6 Z+ s# B5 z% }) X  C$ U( `. V
  564.       t* j4 g& }: K. d. f
  565.     LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance);
    2 G. E. }0 T( ?! m- U; b$ G
  566.     LOG_D("%s dma config done", uart->config->name);
    ! {9 r/ T& U8 g
  567. }3 a3 B1 U0 x$ y" M4 N
  568. 3 i2 g. z4 M7 |
  569. /**# Y& ?! P& m: h4 D) k
  570.   * @brief  UART error callbacks
    ) u& o. P- _5 r% T8 Z: e0 i7 m
  571.   * @param  huart: UART handle
    4 Z& @# _- v: O3 y
  572.   * @note   This example shows a simple way to report transfer error, and you can
    ) i, F; z; w, c
  573.   *         add your own implementation.! ?2 |/ a! T5 A. v
  574.   * @retval None, D; U4 \' ^, ^* T9 Z7 h
  575.   */( d; x1 y1 A9 R: P6 j
  576. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
    9 {4 ^/ ^2 `% k0 C3 b- X
  577. {
    . }  e  p. D. j) j
  578.     RT_ASSERT(huart != NULL);& V6 S" v+ c& L: O. [
  579.     struct stm32_uart *uart = (struct stm32_uart *)huart;: F5 D6 v5 C; T9 y
  580.     LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
    ( Q* ~# R+ B' F8 U% d7 \
  581.     UNUSED(uart);8 k4 c) x# q. ?( p  U8 ?1 l: \8 M0 D
  582. }
    4 Z0 J; e; Z% C+ U- o4 s6 a
  583. 3 D. ]0 p! a5 {9 ~3 k4 Z# ^4 w. T
  584. /**5 c# {2 Y7 b9 }# L% t: \
  585.   * @brief  Rx Transfer completed callback& M9 Y7 v: G' R% ?! J$ q
  586.   * @param  huart: UART handle
    - F. ~5 z/ Y+ t! x/ m
  587.   * @note   This example shows a simple way to report end of DMA Rx transfer, and1 i' }% \  z2 _5 [3 v3 M) j  x
  588.   *         you can add your own implementation.
    4 Y! r3 c4 [) `) [
  589.   * @retval None
    , g9 f9 U6 t. q, v
  590.   */$ h7 B: L5 f+ R# u* a3 G
  591. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)' k" ]1 L& P8 Y, V% F4 ]9 w
  592. {
    * g: n  l3 J# F& A2 E$ t5 H7 e
  593.     struct rt_serial_device *serial;+ G- l  }: p  i$ z& J9 w
  594.     struct stm32_uart *uart;
    ( _' X/ L5 H5 w. a% r& k" C
  595.     rt_size_t recv_len;) c9 g, }& q$ j8 T! d" k& u8 ]+ w
  596.     rt_base_t level;# ?: J2 h) ~5 s* u) x8 T

  597. 3 \0 W  Q$ P+ D) e. D
  598.     RT_ASSERT(huart != NULL);
    8 ]9 s% Q' x0 V
  599.     uart = (struct stm32_uart *)huart;" O' x$ B5 R& A
  600.     serial = &uart->serial;
    - G" R6 a: F0 w  x) T" \
  601. ' f# s* `/ V$ N& V) A
  602.     level = rt_hw_interrupt_disable();
    6 Y( |! D0 F+ P' y2 l

  603. . U" \+ M$ _' M# ?" W
  604.     recv_len = serial->config.bufsz - uart->dma.last_index;
    0 N- s7 u/ m& |. H! A$ J
  605.     uart->dma.last_index = 0;. H& [# V5 o, u/ }+ k4 L

  606. - q  Z2 B7 D9 }& T" Z& C
  607.     rt_hw_interrupt_enable(level);
    5 C; X' K( R4 H* {, f
  608.     if (recv_len)$ L# S7 M+ A) \# a# A, A* i5 T; U
  609.     {
    0 }$ p! G$ [6 o0 H; R2 G( T% u
  610.         rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
    9 z" z6 T. I0 E  D7 p. |
  611.     }
    ( O6 p5 `, w0 s) T
  612. }+ w% A4 {7 a7 x, R
  613. #endif  /* RT_SERIAL_USING_DMA */
    8 h. }, v# b  x# z; t! i6 K, u

  614. 3 ]+ @7 ^' J! G. h( v" Z7 s
  615. static void stm32_uart_get_dma_config(void)/ I6 X! I( }2 k
  616. {
    8 t$ V3 X9 P4 R7 m; j
  617. #ifdef BSP_UART1_RX_USING_DMA
    6 `- ?0 S+ T8 O4 m9 i4 @% T
  618.     uart_obj[UART1_INDEX].uart_dma_flag = 1;) O; G5 k$ T- q; S; s
  619.     static struct dma_config uart1_dma_rx = UART1_DMA_CONFIG;
    ' A$ U* T6 h3 u, l- a# Z
  620.     uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
    & X* e& ^2 N, ?) H# A
  621. #endif) x% s! s5 x; H- A
  622. #ifdef BSP_UART2_RX_USING_DMA7 N  g; [. m; H8 R2 w
  623.     uart_obj[UART2_INDEX].uart_dma_flag = 1;2 V1 S) s1 ^1 y' C: {; h8 Y* y
  624.     static struct dma_config uart2_dma_rx = UART2_DMA_CONFIG;
    ( }5 I7 y# C% d, b
  625.     uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;" f0 u3 n6 i& ?8 U
  626. #endif
    2 i1 t) ^( T8 E
  627. #ifdef BSP_UART3_RX_USING_DMA. @# G1 S$ a$ ?( x% q
  628.     uart_obj[UART3_INDEX].uart_dma_flag = 1;
    ; s' \% q6 t( T& u* ?
  629.     static struct dma_config uart3_dma_rx = UART3_DMA_CONFIG;" }. W: v  s# R0 b. s
  630.     uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
    0 `0 ^$ b  j# Z8 c1 \9 s
  631. #endif# e1 {- T, Z& ], ]  O
  632. #ifdef BSP_UART4_RX_USING_DMA. v7 ?7 D% ?( i
  633.     uart_obj[UART4_INDEX].uart_dma_flag = 1;( P# Q/ x0 Q, b+ l5 K1 Y, g
  634.     static struct dma_config uart4_dma_rx = UART4_DMA_CONFIG;# T# ]1 g. k. S8 f
  635.     uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
    , }* j* O' W( w
  636. #endif
    / ?% L! B2 }8 k
  637. #ifdef BSP_UART5_RX_USING_DMA
    $ O$ D* f5 W2 L1 E, J" g
  638.     uart_obj[UART5_INDEX].uart_dma_flag = 1;
    2 p$ `+ y# \8 D
  639.     static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG;
    ; _8 L8 n/ P/ y& U1 [% ]
  640.     uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;1 s1 S; x7 X$ }9 p% D
  641. #endif) P6 ~4 r: c5 J0 k* ?9 _5 o" O
  642. #ifdef BSP_UART6_RX_USING_DMA
      ^$ Z$ B0 ]9 ?0 q) A2 L( l! W
  643.     uart_obj[UART6_INDEX].uart_dma_flag = 1;8 q3 S# w# S3 g; C& B/ d3 G
  644.     static struct dma_config uart6_dma_rx = UART6_DMA_CONFIG;
    + s) i" F- ^6 U
  645.     uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;0 s) ~/ Y! Q7 |, f
  646. #endif
    2 s* I3 s" l8 e* ]' Y6 }
  647. #ifdef BSP_LPUART1_RX_USING_DMA
    " ^  S% x+ Q" X* J, ]- e
  648.     uart_obj[LPUART1_INDEX].uart_dma_flag = 1;
    2 }  J, b% _4 Z+ T% n4 @& r% |
  649.     static struct dma_config lpuart1_dma_rx = LPUART1_DMA_CONFIG;
    ' [' Z$ f( R& _: ?
  650.     uart_config[LPUART1_INDEX].dma_rx = &lpuart1_dma_rx;
    % N7 [. Q* t* s# q2 H
  651. #endif
    1 \& ^+ m2 J' a# M. A
  652. }
    0 ?' X7 I' ~4 u

  653. 7 a) j5 t, l$ p3 N/ f% s
  654. int rt_hw_usart_init(void)
    1 v6 b7 o7 x" \) X
  655. {5 }% O& P, y# W9 B' \
  656.     rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
    . q! t7 E* ?8 s
  657.     struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;' q/ l+ @. s* P, y1 j
  658.     rt_err_t result = 0;
    5 \: N& U: U  N9 N: ^: u

  659. 3 P1 M& E& y" x8 D4 a
  660.     stm32_uart_get_dma_config();2 ^2 l6 q7 g4 g1 l7 ?/ e
  661.     / n: P0 h/ _" x/ K( Y, }* `
  662.     for (int i = 0; i < obj_num; i++)8 d8 c' R7 r3 [  ]; v0 U
  663.     {7 C+ y+ t6 y! B9 G& C! `
  664.         uart_obj[i].config = &uart_config[i];
    - L9 P/ x( X7 u4 m
  665.         uart_obj[i].serial.ops    = &stm32_uart_ops;2 c0 B, q4 n% V9 F% Z* A
  666.         uart_obj[i].serial.config = config;* L4 t( D5 B- Q, N0 T

  667. + C  H) k4 _6 O& j# U, x  g0 `
  668. #if defined(RT_SERIAL_USING_DMA)7 V" R" s7 i5 D/ O) `% b
  669.         if(uart_obj[i].uart_dma_flag)8 @1 l9 L8 W+ q/ n
  670.         {( c# `9 ~$ E. w* J/ W, |
  671.             /* register UART device */
    / v* D, |8 A7 _) \9 m
  672.             result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
    , Q5 J* s# u( z* n1 Y! K# y
  673.                                            RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX| RT_DEVICE_FLAG_DMA_RX
    , K0 W# k9 l+ u9 I7 _- Q9 t' a
  674.                                            ,&uart_obj[i]);
    ) s, I- |8 \. s+ e; F4 ~
  675.         }
    + M1 T" }& L/ K; s' K  y; }
  676.         else1 u, k: W% p; c6 L5 ~' b
  677. #endif  w: }5 G1 p9 q7 c' I9 V
  678.         {6 `, ?' W& J6 _' H: t
  679.             /* register UART device */) L. x* h1 v4 ]4 E
  680.             result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name," E8 r; d& h' i0 _. M4 ?
  681.                                            RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
    5 y; \4 f" q: y
  682.                                            ,&uart_obj[i]);* W& e2 F5 D8 e- H
  683.         }/ J/ U8 K# D, d, H
  684.         RT_ASSERT(result == RT_EOK);" a' y$ I# P3 K6 c' q* r+ i
  685.     }
    6 _! D# [0 [' S0 v
  686. . p7 t- y* Y5 h3 M, ^8 e
  687.     return result;
    % c) d: a7 E- C; j! F/ v  j8 H
  688. }9 A: A3 U1 j& I* O5 ?
  689. ' H5 r* Z+ J) U) Z: z
  690. #endif /* RT_USING_SERIAL */+ F6 U% g+ S* k: k# g# a
  691. 5 [6 b5 D. x1 V' i1 l1 v4 }' x8 r
复制代码
" G2 n! Z/ ^% ]( W5 H

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发表于 2019-4-17 10:22:57 | 显示全部楼层
差37积分才能发消息,不好意思,回不了你们消息
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发表于 2019-4-17 10:26:12 | 显示全部楼层
我QQ 390763144
: e6 u+ n( C4 _% u微信 dream_daiblo3 T' {6 `5 U8 E% Y, O+ p
  ?  z! n2 n' @7 L0 M) m. d

: `- q6 a9 V1 R, M; T& L
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发表于 2019-4-17 12:48:08 | 显示全部楼层
没有添加hal库的串口驱动导致,参考此文错误日志,解决
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发表于 2019-4-17 16:02:28 | 显示全部楼层
Ernest 发表于 2019-4-17 12:484 V; A% |  v5 ~
没有添加hal库的串口驱动导致,参考此文错误日志,解决

! G% F4 ?( S6 q3 |4 O感谢陈老师的帮助,上面问题解决了,能编译通过了,第一次用CubeMX,没注意这个问题。。。
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发表于 2019-4-17 16:04:42 | 显示全部楼层
现在编译能通过,但是程序会卡在这个函数) q/ k+ }, H& [1 w% }: P
  1. static int stm32_putc(struct rt_serial_device *serial, char c)
    ! L& o- U/ E' f! r# @
  2. {, S! j- c, e/ M) n
  3.     struct stm32_uart *uart;
    : @2 Z  L! x& d3 U
  4.     RT_ASSERT(serial != RT_NULL);
    , E) @3 {  c7 N) K3 x" ~

  5. # g, c# _0 Z& j0 N2 Q
  6.     uart = (struct stm32_uart *)serial->parent.user_data;; o  q3 E+ z5 K
  7.     UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
    3 Y/ B+ t& p/ Y
  8. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \  X' B, S5 ^* t2 N1 d
  9.     || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
    2 i2 K: [* Y3 o
  10.     uart->handle.Instance->TDR = c;+ u$ W: d8 e/ a% L
  11. #else
      a4 D! n  v: W" H5 V% C+ p. I
  12.     uart->handle.Instance->DR = c;
    6 q  P" G8 g3 Y; {* M
  13. #endif
    ( d9 H' r# M& X* N/ X7 J0 Q# v& S9 v
  14.     while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
    . Z. o  ?$ y& h+ \9 ?9 g
  15.     return 1;
    / W0 f0 O5 t$ |
  16. }
复制代码
6 V+ j8 s. Z1 {& V% E
6 S& b, N) U( r1 I7 _: O# o$ J: X
具体是这条语句 while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);,没有任何信息打印,不知道hal库怎么调试。。。
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发表于 2019-4-17 16:23:53 | 显示全部楼层
Ernest 发表于 2019-4-17 10:01
& |- _* ?5 b8 o# T+ Zhttps://www.rt-thread.org/qa/thread-10348-1-1.html! X2 q3 k: f8 }3 u1 R
老的bsp驱动可以参考这个更改
8 u$ r( B8 l# X$ G' U' W
现在按这个链接再试试,实在还不行就只有将就用2.1.2版本的了。。。
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发表于 2019-4-17 17:13:36 | 显示全部楼层
本帖最后由 Ernest 于 2019-4-17 17:15 编辑
- t. t- Q( H% M0 U. _# M. k& w
Tiv 发表于 2019-4-17 16:23; j6 O" z7 O6 r" y
现在按这个链接再试试,实在还不行就只有将就用2.1.2版本的了。。。

5 w' ^' _% ~- `+ K- W中午不是与你交流了吗?是没有添加hal 库的串口驱动文件导致的。
: y, P* R/ j6 R" Z4 A1 j0 P) n$ L! H' U3 L; F, Z) d- z5 r  P, h7 t% ?
添加之后,依然存在问题,是没有按照相关文档要求下载指定位置的文件
( ]/ N* e& t( ^# y( o! ~! X1 `& m8 U& a; y- Z
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